The formation of various integrated circuit (IC) device structures often relies on photolithographic processes or photolithography. Photolithography generally involves selectively exposing regions of a resist-coated silicon wafer to form a radiation pattern thereon. Once exposure is complete, the exposed resist is developed in order to selectively expose and protect the various regions on the silicon wafer defined by the exposure pattern (e.g., silicon regions in the substrate, polysilicon on the substrate, or insulating layers, such as silicon dioxide).
The photolithography or pattern transfer system includes a reticle (or mask), which includes a pattern thereon corresponding to features to be formed in a layer on the substrate. The reticle typically includes a transparent glass plate covered with a patterned light blocking material, such as chrome. The reticle is placed between a radiation source producing radiation of a pre-selected wavelength (e.g., ultraviolet light) and a focusing lens, which may form part of a stepper apparatus. Placed beneath the stepper is the resist-coated silicon wafer. When the radiation from the radiation source is directed onto the reticle, light passes through the glass (in the region not containing the chrome mask patterns) and projects onto the resist-coated silicon wafer. In this manner, an image of the reticle is transferred to the resist.
The resist (sometimes referred to as the “photoresist”) is provided as a thin layer of radiation-sensitive material that is typically spin-coated over the entire silicon wafer surface. The resist material can be classified as either positive or negative depending on how it responds to the light radiation. Positive resist, when exposed to radiation, becomes more soluble and is thus more easily removed in a development process. As a result, a developed positive resist contains a resist pattern corresponding to the dark regions on the reticle. Negative resist, in contrast, becomes less soluble when exposed to radiation. Consequently, a developed negative resist contains a pattern corresponding to the transparent regions of the reticle.
There is a pervasive trend in the art of IC design and fabrication to increase the density with which various structures are arranged. For example, line widths and separation between lines is becoming increasingly smaller. With this size reduction, however, various steps within the integrated circuit design and fabrication process become more difficult. For example, the electrical model for an integrated circuit device design is typically defined by simple, predictable structures that are not impacted by corner rounding or proximity to other structures. However, as the demand for smaller scale devices increases, layouts are further optimized and structures are compressed as much as possible. The unfortunate result of this is that the real physical layouts do not match the electrical model characteristics, and therefore, the designs do not behave as predicted and/or desired by the designer.
Further, designers typically use an average value for pattern variations when designing structures within IC devices that are supposed to be the same and/or have a fixed relationship relative one another. For instance, a designer may want one structure within a device to have a fixed relationship to another structure within the device (e.g., device “A” must have at least 10 percent greater gain than device “B”). In this case, the designer typically ends up over guard banding variations between the structures (i.e., designing to a worst case variation).
Accordingly, a need exists in the art for a system and method for designing integrated circuit devices that can accurately model electrical characteristics of the device as well as accurately predict variations between structures within the device.